The present invention generally relates generally to an apparatus for generating an internal voltage of a semiconductor device, and more particularly, to an apparatus and a method for generating a pumping voltage which prevent an excessive increase of the pumping voltage so that a regular level of the pumping voltage is maintained.
FIG. 1 is a diagram showing a conventional apparatus for generating a pumping voltage. The conventional apparatus has an oscillator 10, a charge pumping unit 20 and a level detecting unit 30.
The oscillator 10 operates in response to a pumping enable signal ppe received from the level detecting unit 30. The oscillator 10 generates a pulse signal osc having a given cycle when the pumping enable signal ppe is activated making the pumping enable signal ppe a high level. When the pumping enable signal ppe is activated, the oscillator outputs the pulse signal osc to the charge pumping unit 20.
The charge pumping unit 20 generates a pumping voltage VPP in response to the pulse signal osc. The level detecting unit 30 detects the level of the pumping voltage VPP by comparing the pumping voltage VPP with a reference voltage VREF, and activates the pumping enable signal ppe according to the detected level of the pumping voltage VPP.
The conventional apparatus operates as follows. The level detecting unit 30 detects the level of the pumping voltage VPP (which is received from the charge pumping unit 20) and compares the pumping voltage VPP to the reference voltage VREF. When the pumping voltage VPP is lower than the reference voltage VREF, the pumping enable signal ppe is activated at a high level and is output to the oscillator 10.
When the pumping enable signal ppe is activated (i.e., a high level) the oscillator 10 generates the pulse signal osc and outputs the pulse signal osc to the charge pumping unit 20. The charge pumping unit 20 gradually raises the level of the pumping voltage VPP until the pumping voltage VPP reaches a predetermined level in each high level period of the pulse signal osc. When the pumping voltage VPP reaches the predetermined level, the level detecting unit 30 deactivates the pumping enable signal ppe so that it is a low level in order to stop generation of the pulse signal osc. As a result, the increase in the pumping voltage stops.
The conventional apparatus described above is designed to maintain a predetermined DC level of the pumping voltage VPP during the general operation of a dynamic random access memory (DRAM).
However, electrostatic discharge from current flow-in or from a pad and the noise effect of an external supply power VDD cause the level of the pumping voltage VPP to be higher than the target level by what can be considered an excessive amount.
When the excessively high pumping voltage is supplied to a gate of a transistor through a word line, the gate oxide film between the gate and the bulk deteriorates due to the excessive bias, and thereby the operational characteristics of the DRAM diminish, as shown in FIG. 2.